Tuyển kỹ sư Back-end tại Công Ty JSC AWAH Việt Nam
• JSC AWAH Viet Nam performs the research and the development the VLSI semiconductor including the design, the S/W and the physical implementation. It will be the first company in the non-memory ASIC industry of Vietnam. Its employees should save many experiences of the leading technology of semiconductor industry.
• JSC AWAH Viet Nam location: 1st Floor, SK Telecom building, Quang Trung Software City, Lot 11, Road No.5, Tan Chanh Hiep Ward, District 12, Ho Chi Minh City.
Tel: 84-8-37154009
Fax: 84-8-37154010
Website: http://www.awah.co.kr
• JSC AWAH Viet Nam location: 1st Floor, SK Telecom building, Quang Trung Software City, Lot 11, Road No.5, Tan Chanh Hiep Ward, District 12, Ho Chi Minh City.
Tel: 84-8-37154009
Fax: 84-8-37154010
Website: http://www.awah.co.kr
I. Senior ASIC/SoC Back-end Engineer
Quantity: 02 – Code: BE-S01
Job Description
• Perform, manage and be responsible for ASIC/SoC physical design flow in 90nm, 65nm and under process from RTL/Netlist to GDSII stage for company’s projects.
• Perform, manage and be responsible for ASIC/SoC physical design flow in 90nm, 65nm and under process from RTL/Netlist to GDSII stage for company’s projects.
Job Requirements
• Library preparation.
• Physical floor planning for full-chip, block and hierarchical designs.
• Standard cell placement and signal Routing.
• Clock tree synthesis (CTS).
• Static Timing Analysis (STA), Statistical STA (SSTA), On-chip Variation (OCV), Native-OCV …
• Timing Analysis and Closure; Signal Integrity Analysis; Parasitic Extraction, Static and dynamic IR Analysis (IRDrop) …
• Physical Verification (LVS/DRC, Antenna…)
• Be capable of Multi voltage threshold (Multi-Vt), Multi power supply designs, Multi mode multi corner (MMMC) designs.
• Familiar with Synthesis & Backend tools from Magma, Cadence or Synopsys.
• Library preparation.
• Physical floor planning for full-chip, block and hierarchical designs.
• Standard cell placement and signal Routing.
• Clock tree synthesis (CTS).
• Static Timing Analysis (STA), Statistical STA (SSTA), On-chip Variation (OCV), Native-OCV …
• Timing Analysis and Closure; Signal Integrity Analysis; Parasitic Extraction, Static and dynamic IR Analysis (IRDrop) …
• Physical Verification (LVS/DRC, Antenna…)
• Be capable of Multi voltage threshold (Multi-Vt), Multi power supply designs, Multi mode multi corner (MMMC) designs.
• Familiar with Synthesis & Backend tools from Magma, Cadence or Synopsys.
II. Junior ASIC/SoC Back-end Engineer
Quantity: 02 – Code: BE-J01
Job Description
• Perform and support BE team to manage ASIC/SoC physical design flow in 90nm, 65nm and under process from RTL/Netlist to GDSII stage for company’s projects.
• Perform and support BE team to manage ASIC/SoC physical design flow in 90nm, 65nm and under process from RTL/Netlist to GDSII stage for company’s projects.
Job Requirements
• Good understanding of Principle of Integrated Circuits, FPGA architecture.
• Familiar with Digital/Logic Design with an understanding of Analog circuits
• Have knowledge of floor planning for full-chip, block and hierarchical designs; Placement and Routing; Static Timing Analysis (STA); Physical Verification (LVS/DRC, Antenna…) preferred.
• Understanding of Signal Integrity effect on High speed design.
• Familiar with Synthesis & Backend tools from Magma, Cadence or Synopsys.
• Good understanding of Principle of Integrated Circuits, FPGA architecture.
• Familiar with Digital/Logic Design with an understanding of Analog circuits
• Have knowledge of floor planning for full-chip, block and hierarchical designs; Placement and Routing; Static Timing Analysis (STA); Physical Verification (LVS/DRC, Antenna…) preferred.
• Understanding of Signal Integrity effect on High speed design.
• Familiar with Synthesis & Backend tools from Magma, Cadence or Synopsys.
Qualifications ( BE-S01 & BE-J01 )
• Minimum education level: Bachelors, Advantage for Masters, in Electronics & Telecommunications, Computer Science, Physics – Electronics, Physics – Informatics and Automation or equivalent fields.
• At least 4 years (Senior – BE-S01) or 0 - 2 years (Junior – BE-J01) experience working in ASIC/SoC physical design position.
• Unix/Linux system experience desired.
• Familiar with RTL languages such as Verilog/VHDL.
• Working knowledge of scripting languages such as TCL, Perl …
• Good English and Vietnamese communications skills, both verbal and writing.
• Professional behavior, and good relationships with others and society.
• Minimum education level: Bachelors, Advantage for Masters, in Electronics & Telecommunications, Computer Science, Physics – Electronics, Physics – Informatics and Automation or equivalent fields.
• At least 4 years (Senior – BE-S01) or 0 - 2 years (Junior – BE-J01) experience working in ASIC/SoC physical design position.
• Unix/Linux system experience desired.
• Familiar with RTL languages such as Verilog/VHDL.
• Working knowledge of scripting languages such as TCL, Perl …
• Good English and Vietnamese communications skills, both verbal and writing.
• Professional behavior, and good relationships with others and society.
Additional Desirable Skills
Any of the following is highly desirable but not required:
• ARM processors and other TOSHIBA/ATMEL IPs/products.
• Have knowledge about TOSHIBA/ATMEL design flow.
Any of the following is highly desirable but not required:
• ARM processors and other TOSHIBA/ATMEL IPs/products.
• Have knowledge about TOSHIBA/ATMEL design flow.
Contact Information:
Company: AWAH JSC Viet Nam
Address: 1st Floor, SK Telecom building, Quang Trung Software City, Lot 11, Road No.5, Tan Chanh Hiep Ward, District 12, Ho Chi Minh City.
Contact Person: Mr. Dũng
Email: This e-mail address is being protected from spambots. You need JavaScript enabled to view it
Tel: 08-3.7154.009
Company: AWAH JSC Viet Nam
Address: 1st Floor, SK Telecom building, Quang Trung Software City, Lot 11, Road No.5, Tan Chanh Hiep Ward, District 12, Ho Chi Minh City.
Contact Person: Mr. Dũng
Email: This e-mail address is being protected from spambots. You need JavaScript enabled to view it
Tel: 08-3.7154.009
