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Job code: EHW14-04

Job description

• Responsible for DFT design and DFT verification (SOC, MCU, ASIC products)

Job requirement

• Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics
• At least 3 years’ experience in DFT design/verification or LSI logic design/verification
• Solid understanding about DFT technique: Memory BIST, Logic BIST, Boundary Scan
• Solid knowledge in using EDA tool (ex: Synopsys, Cadence  DFT/Simulation tools)
• High ability in scripting with Perl, TCL, UNIX shell, or equivalent scripting languages
• Have ability in LSI Test cost optimization, balance Test cost and other Cost
• Good written and oral communication & interpersonal skills
• Have good team working skill and good relationship with the others
• Long-term working commitment

Job code: EHW14-03

Job description

• Responsible for CPU/IP and subsystem design including specification, RTL design and verification

Job requirement

• Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics
• At least 3 years working experience in Electronics Engineering/Computer Engineering with CPU/IP logic design and verification field
• Have a solid understanding of RTL Design (Verilog preferred), System Verilog
• Have knowledge of Perl, TCL, UNIX shell, or equivalent scripting languages
• Have knowledge of ARM CPU and AMBA bus protocol (preferred)
• Good written and oral communication & interpersonal skills
• Have good team working skill and good relationship with the others
• Long-term working commitment

Job code: EHW14-02

Job description

• Responsible for Automotive MCU design including specification, RTL design and logic verification

Job requirement

• Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics
• At least 3 years working experience in Electronics Engineering/Computer Engineering with logic design and verification field.
• Have solid understanding of RTL Design (Verilog preferred), System Verilog
• Have solid understanding of System logic design
• Good at logic verification and simulation including debugging skill
• Have knowledge of Perl, TCL, UNIX shell, or equivalent scripting languages
• Good written and oral communication & interpersonal skills
• Have good team working and good relationship with the others
• Long-term working commitment

Job code: EHW14-01

Job description

• Responsible for module or IP design including specification, RTL design and random verification

Job requirement

• Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics
• At least 3 years’ experience in Electronics Engineering/Computer Engineering with Module/IP logic design and verification field
• Have basic knowledge of USB3.0 xHCI, USB2.0 EHCI, PCIe3.0. eMMC, Ethernet
• Good at C coding (experience in Assembly language is a plus)
• Solid understanding of RTL Design (Verilog is preferable), System Verilog
• Experience with random verification for IP using System Verilog, VMM, UVM
• Have knowledge of using random verification model (ex; Synopsys or Cadence).
• Have knowledge of Perl, TCL, UNIX shell, or equivalent scripting languages.
• Good written and oral communication & interpersonal skills
• Have good team working skill and good relationship with the others
• Long-term working commitment

Expected starting date:as soon as possible

We offer a competitive compensation and benefits package. Interested candidates can send applications from now by following ways:

• Apply online below

• E-mail CV to This e-mail address is being protected from spambots. You need JavaScript enabled to view it ; or

• Post CV to:

  Ms. Ho Thi Ngoc Ha

  Human Resource Dept.,

  Renesas Design Vietnam Co., Ltd., Tan Thuan Road,

  Tan Thuan EPZ., Dist. 7, HCMC

* Only short list will be contacted.

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